(1) Field of the Invention
The invention relates to the general field of semiconductor integrated circuits, more particularly to methods for removing voids in conductive vias in integrated circuits.
(2) Description of the Prior Art
As integrated circuits grow ever denser, the devices and the wires that connect them need to shrink in size. This required size reduction also applies to the conductive vias that are used to make electrical connections between wires at different levels. When the diameters of the via holes get to be less than about 0.5 microns, it becomes increasingly more difficult to fill them completely and reliably so that metal is guaranteed to extend across the entire gap between the two levels that are being connected.
This problem of filling very small diameter via holes is illustrated in FIGS. 1a and 1b. In FIG. 1a, via hole 1, having vertical sidewalls, has been etched through insulating layer 2. The latter was previously deposited onto layer 3 of conductive wiring. FIG. 1b shows how a problem of completely filling such a via hole can arise. Instead of extending all the way to layer 3 by filling via hole 1, layer 4 of next level wiring has penetrated only part way which has resulted in the formation of void 5.
During the deposition of layer 4, atoms of 4 would reach the bottom of via hole 1 only if they happened to be travelling almost exactly parallel to the vertical sidewalls of 1. All other atoms would condense on these sidewalls some distance from the bottom of the hole which would quickly fill near the top, effectively preventing even the few correctly oriented atoms from reaching the bottom.
A number of solutions to this problem have been proposed in the prior art. For example, as shown in FIG. 2, a tapered via hole 21 may be used. This leads to good hole filling but limits the density of vias that can then be achieved. Subjecting the structure to high temperatures and/or pressures, after top metal deposition, has also been proposed. These methods, while potentially effective, are not totally satisfactory. High temperatures add to the thermal budget (total energy needed to manufacture the structure) and also introduce the possibility of causing unwanted changes in other parts of the structure. High pressures require expensive specialized equipment and also introduce a safety risk into the operation.
Since one of the embodiments of the present invention involves the use of centrifuging, we note that centrifuging has been described in the prior art as a method for improving the concentration of filler particles in composite materials. For example, Noordegraaf et al. (U.S. Pat. No. 5,002,115 March 1991) describe a method for evenly dispersing filler particles or fibers, such as silicon carbide, in a metal matrix, such as zinc. A mesh that holds the fiber particles is placed above an empty mould and a cover plate with a hole is placed over the mesh. Molten metal is poured through the hole and, under the influence of the centrifuging action, is forced through the mesh into the mould, taking filler particles with it.
Ahmad (U.S. Pat. No. 3,716,461 February 1973) is also an improved method for forming a composite material. The matrix metal is formed by means of electrodeposition, the filler particles being suspended in the electrolyte. The rate at which filler particles settle is increased by centrifuging so their concentration in the electro-formed material is similarly increased.
We are unaware of any published applications of artificial gravity that has been generated by methods other than centrifuging. In a pending application by the same inventor, (patent application Ser. No. 08/703,919 filed Aug. 22, 1996) artificial gravity, generated in several different ways, was used to assist in the planarizing of the surface of an integrated circuit. The present invention uses similar technology for generating the artificial gravity but, beyond that, is quite unrelated to Ser. No. 08/703,919.